Sem descrição.
03/07/2025
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LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY servo IS
PORT (
clock: in std_logic;
dir: in std_logic_vector(1 downto 0); -- 00=left, 01= top, 11 = right
pwm: out std_logic_vector(0 to 0);
ledr: out std_logic_vector(0 to 2)
);
END entity;
-- clock = 200pS
-- 200ps * 100000 = 20ms
ARCHITECTURE funcao OF servo IS
begin
process (clock, dir)
-- constant clock_division: natural := 100;
constant clock_division: natural := 1000000;
variable contador : natural range 0 to clock_division;
-- variable nivel_led : std_logic:= '1';
variable dutty_time: natural := 10; -- 10%
variable active_limit : natural := (clock_division * dutty_time) / 100;
BEGIN
case dir is
when "00" =>
dutty_time := 3; -- 3% = 0.6ms
ledr(0) <= '0';
ledr(1) <= '0';
when "01" =>
dutty_time := 7; -- 7% ~= 1.5ms
ledr(0) <= '1';
ledr(1) <= '0';
when "11" =>
dutty_time := 12; -- 12% = 2.4ms
ledr(1) <= '1';
when others =>
dutty_time := 7;
ledr(1) <= '0';
end case;
if rising_edge(clock) then
contador := contador + 1;
if contador = clock_division then
contador := 0;
end if;
if contador < active_limit then
pwm(0) <= '1';
ledr(2) <= '1';
else
pwm(0) <= '0';
ledr(2) <= '0';
end if;
end if;
end process;
END ARCHITECTURE;