Exercício 1

implemente a ULA vista na aula 10 utilizando PROCEDURE com PACKAGE

Projete e sumule uma ULA (unidade lógica aritmética) que faça as 4 operções básicas. As entradas devem variar até 7.

main.vhd

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE work.arith.all;

ENTITY proce IS
    PORT (in1, in2 : IN INTEGER RANGE 0 TO 7;
        operacao: in std_logic_vector(0 to 1);
        saida : OUT INTEGER RANGE 0 TO 7);
END proce;

ARCHITECTURE logica OF proce IS
begin
    process (in1, in2, operacao)
    BEGIN
        ula(in1, in2, operacao, saida);
    end process;
END logica;

arith.vhd

LIBRARY ieee;
USE ieee.std_logic_1164.all;


PACKAGE arith IS
    CONSTANT limit : INTEGER:= 7;
    PROCEDURE ula(
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
        SIGNAL selec: IN std_logic_vector(0 to 1);
        SIGNAL saida: OUT INTEGER RANGE 0 TO limit
    );
END arith;

PACKAGE BODY arith IS
PROCEDURE ula(
    SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
    SIGNAL selec: IN std_logic_vector(0 to 1);
    SIGNAL saida: OUT INTEGER RANGE 0 TO limit
) IS
BEGIN
    case selec is
        when "00" => saida <= in1+in2;
        when "01" => saida <= in1-in2;
        when "10" => saida <= in1*in2;
        when "11" => saida <= in1/in2;
    end case;
END ula;
END arith;

Exercício 2

Faça uma calculadora com duas saídas: uma para soma e outra para multiplicação. As entradas devem variar até 7.

main.vhd

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE work.arith.all;

ENTITY proce IS
    PORT (in1, in2 : IN INTEGER RANGE 0 TO 7;
        saida1, saida2 : OUT INTEGER RANGE 0 TO 7);
END proce;

ARCHITECTURE logica OF proce IS
begin
    process (in1, in2)
    BEGIN
        add_mult(in1, in2, saida1, saida2);
    end process;
END logica;

arith.vhd

LIBRARY ieee;
USE ieee.std_logic_1164.all;


PACKAGE arith IS
    CONSTANT limit : INTEGER:= 7;
    PROCEDURE ula(
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
        SIGNAL selec: IN std_logic_vector(0 to 1);
        SIGNAL saida: OUT INTEGER RANGE 0 TO limit
    );
    procedure add_mult(
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
        SIGNAL saida1, saida2: OUT INTEGER RANGE 0 TO limit
    );
    
END arith;

PACKAGE BODY arith IS
PROCEDURE ula(
    SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
    SIGNAL selec: IN std_logic_vector(0 to 1);
    SIGNAL saida: OUT INTEGER RANGE 0 TO limit
) IS
BEGIN
    case selec is
        when "00" => saida <= in1+in2;
        when "01" => saida <= in1-in2;
        when "10" => saida <= in1*in2;
        when "11" => saida <= in1/in2;
    end case;
END ula;

PROCEDURE add_mult(
    SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
    SIGNAL saida1, saida2: OUT INTEGER RANGE 0 TO limit
) IS
BEGIN
    saida1 <= in1+in2;
    saida2 <= in1*in2;
END add_mult;
END arith;

Exercício 3

Faça uma calculadora com duas saídas: uma para soma (FUNCTION) e outra para multiplicação (PROCEDURE).

arith.vhd

LIBRARY ieee;
USE ieee.std_logic_1164.all;


PACKAGE arith IS
    CONSTANT limit : INTEGER:= 7;
    PROCEDURE ula(
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
        SIGNAL selec: IN std_logic_vector(0 to 1);
        SIGNAL saida: OUT INTEGER RANGE 0 TO limit
    );
    
    procedure add_mult(
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
        SIGNAL saida1, saida2: OUT INTEGER RANGE 0 TO limit
    );
    
    function sum (
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO 7
    ) return integer;    
    
    procedure multp(
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
        SIGNAL saida: OUT INTEGER RANGE 0 TO limit

    );
    
    
END arith;

PACKAGE BODY arith IS
PROCEDURE ula(
    SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
    SIGNAL selec: IN std_logic_vector(0 to 1);
    SIGNAL saida: OUT INTEGER RANGE 0 TO limit
) IS
BEGIN
    case selec is
        when "00" => saida <= in1+in2;
        when "01" => saida <= in1-in2;
        when "10" => saida <= in1*in2;
        when "11" => saida <= in1/in2;
    end case;
END ula;

PROCEDURE add_mult(
    SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
    SIGNAL saida1, saida2: OUT INTEGER RANGE 0 TO limit
) IS
BEGIN
    saida1 <= in1+in2;
    saida2 <= in1*in2;
END add_mult;



function sum (
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO 7
) return INTEGER is 
begin
    return (in1 + in2);
end sum;

PROCEDURE multp(
    SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
    SIGNAL saida: OUT INTEGER RANGE 0 TO limit
) IS
BEGIN
    saida <= in1*in2;
END multp;
END arith;

Exercício 4

Refaça a calculadora do exemplo 2 (arquivos originais no moodle) da seguinte forma: ▪ SW(2 downto 0) para a entrada A; ▪ SW(5 downto 3) para a entrada B; ▪ SW(6) para a entrada SEL; ▪ HEX3 para apresentar a entrada A; ▪ HEX2 para apresentar a entrada B; ▪ HEX0 e HEX 1 para apresentar a saída; ▪ Caso precisem converter de binário para inteiro: • USE ieee.numeric_std.all; • to_integer(unsigned(VALOR BINARIO)); ▪ Procedure para separar o display no moodle.

proce.vhd

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE work.arith.all;
USE ieee.numeric_std.all;
LIBRARY work;
USE work.package_calculadora.all;

ENTITY proce IS
    PORT(SW : IN STD_LOGIC_VECTOR(6 downto 0); --SW 012 A; SW 345 B; SW 6 SEL;    
          HEX0: OUT STD_LOGIC_VECTOR(6 downto 0);
          HEX1: OUT STD_LOGIC_VECTOR(6 downto 0);
          HEX2: OUT STD_LOGIC_VECTOR(6 downto 0);
          HEX3: OUT STD_LOGIC_VECTOR(6 downto 0)
    );
          
END proce;

ARCHITECTURE logica OF proce IS
    Signal A, B : INTEGER RANGE 0 TO 7;
    Signal OUTPUT : INTEGER RANGE 0 TO 63;
    Signal unidade, dezena, centena, milhar: INTEGER RANGE 0 TO 15;
begin
    PROCESS(SW)
    Begin
        A <= to_integer(unsigned(SW(2 downto 0)));
        B <= to_integer(unsigned(SW(5 downto 3)));
        
        inteiroparasegmentos(B, HEX3);
        inteiroparasegmentos(A, HEX2);
        
        if (SW(6) = '0') then
            OUTPUT <= sum(A,B);
        else
            multp(A, B, OUTPUT);
        end if;
        
        separar_display(OUTPUT, unidade, dezena, centena, milhar);
        
        inteiroparasegmentos(unidade, HEX0);
        inteiroparasegmentos(dezena, HEX1);
    END PROCESS;
END logica;

arith.vhd

Continua o mesmo

LIBRARY ieee;
USE ieee.std_logic_1164.all;


PACKAGE arith IS
    CONSTANT limit : INTEGER:= 7;
    PROCEDURE ula(
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
        SIGNAL selec: IN std_logic_vector(0 to 1);
        SIGNAL saida: OUT INTEGER RANGE 0 TO limit
    );
    
    procedure add_mult(
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
        SIGNAL saida1, saida2: OUT INTEGER RANGE 0 TO limit
    );
    
    function sum (
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO 7
    ) return integer;    
    
    procedure multp(
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
        SIGNAL saida: OUT INTEGER RANGE 0 TO limit

    );
END arith;

PACKAGE BODY arith IS
PROCEDURE ula(
    SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
    SIGNAL selec: IN std_logic_vector(0 to 1);
    SIGNAL saida: OUT INTEGER RANGE 0 TO limit
) IS
BEGIN
    case selec is
        when "00" => saida <= in1+in2;
        when "01" => saida <= in1-in2;
        when "10" => saida <= in1*in2;
        when "11" => saida <= in1/in2;
    end case;
END ula;

PROCEDURE add_mult(
    SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
    SIGNAL saida1, saida2: OUT INTEGER RANGE 0 TO limit
) IS
BEGIN
    saida1 <= in1+in2;
    saida2 <= in1*in2;
END add_mult;

function sum (
        SIGNAL in1, in2: IN INTEGER RANGE 0 TO 7
) return INTEGER is 
begin
    return (in1 + in2);
end sum;

PROCEDURE multp(
    SIGNAL in1, in2: IN INTEGER RANGE 0 TO limit;
    SIGNAL saida: OUT INTEGER RANGE 0 TO limit
) IS
BEGIN
    saida <= in1*in2;
END multp;

END arith;

package_calculadora.vhd

------------- PACKAGE package_calculadora.vhd ---------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.all;

PACKAGE package_calculadora IS
    PROCEDURE calculadora(SIGNAL ENTRADA_1, ENTRADA_2: IN INTEGER; SIGNAL ENTRADA_3 : IN STD_LOGIC;
                                         SIGNAL SAIDA_1 : OUT INTEGER);
                                         
   PROCEDURE separar_display (SIGNAL inteiro: IN INTEGER; SIGNAL unidade, dezena, centena, milhar: OUT INTEGER RANGE 0 TO 15);                                        
                                         
   PROCEDURE inteiroparasegmentos (SIGNAL bs: IN INTEGER; SIGNAL dsp: OUT STD_LOGIC_VECTOR);
    
    FUNCTION SOMA(ENTRADA_F1, ENTRADA_F2: INTEGER) RETURN INTEGER;
end package_calculadora;

----------------------------------------------------------------------------------------------------
PACKAGE BODY package_calculadora IS

    FUNCTION SOMA (ENTRADA_F1, ENTRADA_F2: INTEGER) RETURN INTEGER IS
    
    BEGIN
        RETURN ENTRADA_F1 + ENTRADA_F2;
    END SOMA;
    
    
    PROCEDURE calculadora(SIGNAL ENTRADA_1, ENTRADA_2: IN INTEGER; SIGNAL ENTRADA_3 : IN STD_LOGIC;
                                         SIGNAL SAIDA_1 : OUT INTEGER) IS
    BEGIN
        
        IF (ENTRADA_3 = '1') THEN
           -- Executa a FUNCTION SOMA
            SAIDA_1 <= SOMA(ENTRADA_1, ENTRADA_2);
        ELSE 
            SAIDA_1 <= ENTRADA_1 * ENTRADA_2;
        END IF;
        
    END calculadora;
    
PROCEDURE inteiroparasegmentos (SIGNAL bs: IN INTEGER; SIGNAL dsp: OUT STD_LOGIC_VECTOR) IS
    BEGIN
    CASE bs IS
     WHEN 0 => dsp <= "1000000"; --0
     WHEN 1 => dsp <= "1111001"; --1
     WHEN 2 => dsp <= "0100100"; --2
     WHEN 3 => dsp <= "0110000"; --3
     WHEN 4 => dsp <= "0011001"; --4
     WHEN 5 => dsp <= "0010010"; --5
     WHEN 6 => dsp <= "0000010"; --6
     WHEN 7 => dsp <= "1111000"; --7
     WHEN 8 => dsp <= "0000000"; --8
     WHEN 9 => dsp <= "0010000"; --9
     WHEN OTHERS => dsp <= "0000000";
    END CASE;
END inteiroparasegmentos;

PROCEDURE separar_display (SIGNAL inteiro: IN INTEGER; SIGNAL unidade, dezena, centena, milhar: OUT INTEGER RANGE 0 TO 15) IS

BEGIN

unidade <= inteiro mod 10;
dezena <= (inteiro/10) mod 10;
centena <= (inteiro/100) mod 10;
milhar <= inteiro/1000;

END separar_display;    
    
END package_calculadora;
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